Renesas in the United Kingdom is seeking a senior analog IC design engineer to lead CMOS block design for custom ASICs in a fast-paced environment. You will verify blocks like amplifiers, oscillators, LDOs, and reference circuits, while guiding layout and collaborating with DFT and test teams.
The role requires 5–8 years’ hands-on analog experience, Cadence/EDA proficiency and strong English communication. Occasional international travel and mentoring responsibilities are included.
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This posting is for the Senior Analog ASIC Lead Engineer role at Renesas, based in City of Edinburgh, Scotland, United Kingdom.
The position is based in City of Edinburgh, Scotland, United Kingdom.
This opportunity is part of our work in Engineering.
The advertised compensation is 70.000 - 95.000.
We aim to respond to suitable candidates as soon as possible.
Full responsibilities and requirements are described in the listing above.