Aion Silicon Ltd is seeking an EMIR/Power Integrity Engineer to join our SoC Physical Design team. You will perform PDN planning, EMIR verification, and signoff for advanced semiconductor designs, ensuring reliable power delivery through static and dynamic IR drop analysis.
You will collaborate with PD, CAD, RTL, package and reliability teams, develop automation flows in Tcl/Python, and contribute to signoff methodology and ECO implementations across 7nm/5nm nodes.
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This posting is for the Power Integrity & EMIR Engineer for SoC Signoff role at Aion Silicon Ltd, based in West of England, England, United Kingdom.
The Power Integrity & EMIR Engineer for SoC Signoff role at Aion Silicon Ltd is now open for applications in West of England, England, United Kingdom.
Join us at Aion Silicon Ltd as our next Power Integrity & EMIR Engineer for SoC Signoff in West of England, England, United Kingdom.