Kandou seeks a Digital Design Engineer to drive high-speed digital circuit development for a chiplet-based AI memory fabric. You will define interfaces, perform RTL design, timing analysis, and rigorously verify blocks with close interaction across verification and analog teams.
Responsibilities include post-silicon lab bring-up, IP integration, and collaboration with customers to meet performance, area, and power targets in deep-submicron CMOS tech.
#J-18808-Ljbffr
This is a genuine role to take on the Senior Digital Design Engineer - High-Speed SerDes & Memory role at Kandou AI.
This posting is for the Senior Digital Design Engineer - High-Speed SerDes & Memory role at Kandou AI, based in Reading, England, United Kingdom.
We are looking to fill the Senior Digital Design Engineer - High-Speed SerDes & Memory position at Kandou AI in Reading, England, United Kingdom.